Neuromorphic computing is an emerging paradigm for developing energy-efficient artificial intelligence (AI) systems that can perform real-time processing on resource-constrained hardware platforms. The leaky integrate-and-fire (LIF) neuron provides a good balance between biological plausibility and computational simplicity, making it well suited for FPGA-based accelerators. This paper presents a comparative analysis of three neuron architectures: quantized LIF (QLIF), piecewise linear LIF (PWL-LIF) and event-driven refractory LIF (REF-LIF) through FPGA implementation and hardware analysis. The neuron models were assessed in terms of FPGA resource utilization, functional correctness, timing performance, and power consumption. The results show that the QLIF model requires the least hardware resources. REF-LIF provides the best efficiency with measured on-chip power consumption of 0.536 W, and PWL-LIF model provides a balanced trade-off between performance and implementation cost. By comparing the neuron architectures, the study demonstrates the impact of neuron model on FPGA implementation efficiency and practical recommendations for selecting appropriate neuron models for scalable and low-power neuromorphic accelerators in real-time edge AI applications.

Neuromorphic computing, Spike neural network (SNN), Artificial neural network(ANN), FPGA, LUT